the germanic honor-culture has survived here and we value doing the right/honorable thing more than anything else.

If you were the Swedish kind of neutral I’d accept that, but you’re the Swiss kind of neutral. You may have stopped selling weapons to both sides of a conflict, you may have even stopped providing offshore accounts for both sides of the conflict, but the overall attitude of “eh it’s not in Switzerland it doesn’t matter” is still around. Heck, you still harbour Nestle. At least you had the sense to go after Steinmetz, though.

So then, you think Nazi Swastikas without context should be allowed without any repercussions.

That’s incoherent. “Nazi swastika” and “without context” doesn’t mesh because “Nazi” is a context for “swastika”.

That aside, I’m going to take German law as an example: No, non-nazi swastikas are very much not outlawed. You can see them on stray Hindu temples or shrines in the country, for example. “Without” context they’re generally assumed to be Nazi ones over here because historical context, also, only Nazis draw random swastikas over here. You also see ones broken in pieces getting thrown in the trash or in a crossed-out circle, those come from the Antifa side.

Both the Hindu and Antifa uses are legal, the Nazi ones aren’t. That’s because German law doesn’t outlaw the swastika as such, it outlaws “using symbols of unconstitutional or outlawed organisations in a manner suitable to further their aims”. A Nazi painting a Swastika on a Jewish gravestone is considered furthering the aims of the NSDAP, which had the swastika as their logo. A Hindu chiselling a swastika into their gravestone is a completely different matter. (Do Hindus use gravestones? Anyway doesn’t matter it’s a hypothetical example).

In another country, where the historical context is different, those “without” context swastikas won’t be interpreted the same as in Germany. So even under German law those would arguably be legal, there.

Assembly is a direct mapping to instructions. It just converts the text into machine code directly,

Kinda… yes and no? At least with x86 there’s still things like encoding selection going on, there’s not a 1:1 mapping between assembly syntax and opcodes.

Also assemblers, at least those meant for human consumption (mostly nasm nowadays) tend to have powerful macro systems. That’s not assembly as such, of course.

But I think your “a compiler changes the structure of the code” thing is spot-on, an assembler will not reorder instructions, it won’t do dead code elimination, but I think it’s not really out of scope of an assembler to be able to do those things – compilers weren’t doing them for the longest time, either.

I think a clearer division would be that compilers deal with two sets of semantics: That of the source language, and that of the CPU. The CPU semantics don’t say things like “result after overflow is undefined”, that’s C speaking, and compilers can use those differences to do all kind of shennanigans. With assemblers there’s no such translation between different language semantics, it’s always the CPU semantics.

The ISA does include sse2 though which is 128 bit, already more than the pointer width. They also doubled the number of xmm registers compared to 32-bit sse2.

Back in the days using those instructions often gained you nothing as the CPUs didn’t come with enough APUs to actually do operations on the whole vector in parallel.

You said something about “choosing”. Cyprus never chose to have the base there, the British chose to keep some land for themselves when they gave Cyprus independence.

32 is ASCII space, the highest number you need is 114 for r (or 122 for z if you want to be generic), that’s a range of 82 or 90 values.

The target string has 13 characters, a long long has 8 bytes or 16 nibbles – 13 fits into 16 so nibbles (the (x >>= 4) & 15) it is. Also the initial x happens to have 13 nibbles in it so that makes sense. But a nibble only has 16 values, not 82, so you need some kind of compression and that’s the rest of the math, no idea how it was derived.

If I were to write that thing I’d throw PAQ at it it can probably spit out an arithmetic coding that works, and look even more arcane as you wouldn’t have the obvious nibble steps. Or, wait, throw NEAT at it: Train it to, given a specific initial seed, produce a second seed and a character, score by edit distance. The problem space is small enough for the approach to be feasible even though it’s actually a terrible use of the technique, but using evolution will produce something that’s utterly, utterly inscrutable.

In certain areas it has practical know-how we don’t. CATL is a good example. Not just their sodium-ion batteries, but their production processes in general. We might be able to readily reproduce their battery chemistries in a lab but that’s not the same as having an industrial production process and the experience from ironing out all the kinks that feed back into basic research. With a joint venture, you can tap into that stuff.

If we had invested as heavily in the tech as they did we probably would be ahead right now but we didn’t so we aren’t. If they had invested as much into fusion as we did – oh wait they did. They’re behind, Max Planck is currently looking into the details of building a commercially viable reactor in the early 2030s, they’re confident to have the plasma physics down now it’s about stuff like “do we use a cheap material for the diverters and replace them often or do we develop/use something fancy”, that is, about actual operational costs.

graphics, video, neural-net acceleration.

All three are kinda at least half-covered by the vector instructions which absolutely and utterly kills any BLAS workload dead. 3d workloads use fancy indexing schemes for texture mapping that aren’t included, video I guess you’d want some special APU sauce for wavelets or whatever (don’t know the first thing about codecs), neural nets should run fine as they are provided you have a GPU-like memory architecture, the vector extension certainly has gather/scatter opcodes. Oh, you’d want reduced precision but that’s in the pipeline.

Especially with stuff like NNs though the microarch is going to matter a lot. Even if a say convolution kernel from one manufacturers uses instructions a chip from another manufacturer understands, it’s probably not going to perform at an optimal level.

VPUs AFAIU are usually architected like DSPs: A bunch of APUs stitched together with a VLIW insn encoder very much not intended to run code that is in any way general-purpose, because the only thing it’ll ever run is hand-written assembly, anyway. Can’t find the numbers right now but IIRC my rk3399 comes with a VPU that out-flops both the six arm cores and the Mali GPU, combined, but it’s also hopeless to use for anything that can’t be streamed linearly from and to memory.

Graphics is the by far most interesting one in my view. That is, it’s a lot general purpose stuff (for GPGPU values of “general purpose”) with only a couple of bits and pieces domain-specific.

Hooking up a BananaPi to a keyboard+monitor is going to be quite a bit cheaper, and unlike with the framework laptop you can’t re-use case, monitor, etc. with an upgraded board.

You can develop using it as an SBC, then put it into the laptop when you go to a conference to present your stuff. Or if you really want to code in the park it’s not like it’d be a microcontroller, it is fast enough to run an editor and compiler.

But granted it’s a hassle to switch out the mainboard. OTOH you can also use the x86 board as an SBC so when you’re at home it doesn’t really matter which board happens to be inside.

I guess from framework’s POV there’s not much of an argument, it’s less “do people want potato laptops” but “do we want to get our feet wet with RISC-V and the SBC market”. Nobody actually needs to use it in a laptop for the whole thing to make sense to them.

You don’t need a laptop to use a framework mainboard, they run without battery and display and everything. So if you have a Framework 13 or are in the market for one this might actually be a very nice thing, especially if the price is comparable to other boards.

ARM prominently has an instruction to deal with Javascript. And RISC-V will have those kinds of instructions, too, they’re too useful, saving a massive amount of instructions and cycles and the CPU itself doesn’t really need any logic added, the insn decoder just has to be taught a bit pattern and which microops to emit, the APUs already can do it.

What that instruction will never do in a RISC CPU though is read from memory.

On the flipside, some RISC-V macroops are CISC, fusing memory access and arithmetic. That’s an architecture detail, though, only affecting code to the degree of "if you want to do this stuff, and want it to run faster on some cores, put those instructions in this exact sequence so the core can spot and fuse them).

have variable width instructions,

compressed instruction set /= variable-width. x86 instructions are anything from one to a gazillion bytes, while RISC-V is four bytes or optionally (very commonly supported) two bytes. Much easier to handle.

vector instructions,

RISC-V is (as far as I’m aware) the first ISA since Cray to use vector instructions. Certainly the only one that actually made a splash. SIMD isn’t vector instructions, most crucially with vector insns the ISA doesn’t care about vector length on an opcode level. That’s like if you wrote MMX code back in the days and if you run the same code now on a modern CPU it’s using just as wide registers as SSE3.

But you’re right the old definitions are a bit wonky nowadays, I’d say the main differentiating factor nowadays is having a load/store architecture and disciplined instruction widths. Modern out-of-order CPUs with half a gazillion instructions of a single thread in flight at any time of course don’t really care about the load/store thing but both things simplify insn decoding to ludicrous degrees, saving die space and heat. For simpler cores it very much does matter, and “simpler core” here can also could mean barely superscalar, but with insane vector width, like one of 1024 GPU cores consisting mostly of APUs, no fancy branch prediction silicon, supporting enough hardware threads to hide latency and keep those APUs saturated. (Yes the RISC-V vector extension has opcodes for gather/scatter in case you’re wondering).

Then, last but not least: RISC-V absolutely deserves the name it has because the whole thing started out at Berkeley. RISC I and II were the originals, II is what all the other RISC architectures were inspired by, III was a Smalltalk machine, IV Lisp. Then a long time nothing, then lecturers noticed that teaching modern microarches with old or ad-hoc insn sets is not a good idea, x86 is out of the question because full of hysterical raisins, ARM is actually quite clean but ARM demands a lot, and I mean a lot of money for the right to implement their ISA in custom silicon, so they started rolling their own in 2010. Calling it RISC V was a no-brainer.

We could, like, dude, dude!, we could turn the earth into a flywheel.

The whole of Jutland is basically one big aquifer. The good news is that Sweden and Norway are nearby, there’s already plenty of HVDC capacity to send Danish and Schleswig-Holstein wind into their hydro storage. Which is also the bad news the capacity is basically tapped out.

Zero loss is not necessary in practice. Those coal plant upgrade kits use graphite blocks with embedded pipes and heating elements wrapped in absolutely bonkers isolation, all in a shipping container. Produce 700C steam. Self-discharge comparable to chemical batteries.

If you want scalable zero-loss storage because you want to store energy on a seasonal scale, or for long-distance transportation, the best solution should be to eat some conversion loss in the beginning. Ammonia, ethanol, suchlike, it’d be nice to have something that’s not toxic but, well.

Oh: Zinc. People have been trying to make rechargeable zinc batteries for ages but it’s just hard but there’s another solution: Forego the recharging part and just throw the resultant zinc oxide back into an industrial refinery process. Works with pretty much any metal but zinc is convenient and we already have tons of infrastructure. To make the stuff zero-loss simply make sure to keep the zinc away from oxygen… which is easy as zinc oxide forms a protective coat so even though it oxidises quite quickly it also quickly stops doing that. Just like aluminium.

I can talk about how France, a white, French ethnostate, is mistreating Muslims without being a racist bigot

Oh boy with the French it doesn’t start with Muslims. It starts with the French, it goes back to at least 1500 with the 1900s being particularly nasty regarding language laws, their education policies eradicated a number of regional languages. And, crucially, they still haven’t reversed course. They got rid of the most damaging policies but still haven’t ratified the ECRML. As a European nation they’re supposed to protect minority and regional language against the onslaught of the Dachsprache.

Also French at least on paper is not a white ethnostate. It’s a French ethnostate. They don’t care about the colour of your skin as long as you carry baguettes under your arm, have an accent at least less grating than the Qubecois, your religion doesn’t matter as long as you’re hardcore secular, and you also need to choose a team in the butter vs. olive oil civil war.

Western Germany recognized the border between Poland - the Oder-Neisse line in 1970.

There was no final settlement until 1990. Because you cannot give up claims on territory you don’t actually control, the ROC is in a similar situation with Mongolia. In Germany’s case there’s the additional complication that until 1990, occupation statutes still applied.

This implied there was only one Germany, in area and population greater than just Western Germany.

No, it didn’t. First off, the preamble isn’t actually part of the constitution, secondly, it did not in any way or form claim rule or sovereignty over the Eastern states. “We’d like to re-absorb those territories” is a different thing than “those territories remain ours”.

Also, German public broadcast used the upper left map for weather reporting up until the 70s, when they switched to the one on the top right without any borders.

Until the early 60s, both sides claimed to be the successor state to the German Empire, the GDR dropped that claim with the construction of the wall. After literally a decade of discussion the West changed to the Neue Ostpolitik in the early 70s and recognised the GDR as a separate state in its territory but did not change its own self-conception as successor state of the Empire. With that it also stopped applying the Hallstein doctrine, stopped to consider other states recognising the GDR as sovereign to be a hostile act.

Then came the two-state period, then there was a revolution in the GDR and while we call it reunification, legally it was the absorption of federal states which happen to be on the territory of the now-former GDR into the constitutional framework of the FRG. Nothing special, happened before with Saarland. If you want to draw a parallel to China I guess you can make one: To the until 1960 situation, with the PRC saying “There’s going to be trouble, ROC, if you move to any other position, it’s the status quo or proper unification no alternative”.

Also, German public broadcast

…is not controlled by the government, least of all the federal government which is responsible, or at least co-responsible, for all foreign policy (but religion and culture because there the federal states are completely sovereign). It does reflect the political attitude back then: That the status quo borders were “arbitrary” and until there’s a better set, the old ones still somehow apply even if it doesn’t match the situation on the ground. The switch in 1970 was the broadcasters throwing their hands up in the air.

And you know what I think the map until 1970 is missing the border to Denmark if I’m not mistaken.

The one China policy is first and foremost about the principle that there is only one China. Hence the name: That the Republic of China and the People’s Republic of China are still locked in a civil war, that neither declared independence from the other. There is no “reuniting” because you cannot unite what is not split, they’re still one.

Which is a rather different situation from divided Germany: The East declared independence as a new state, and the West accepted it. The West still considered Eastern citizens who made their way across the border her own citizens, but there was no “you can’t have your own sovereign state” stuff going on, from either side. Upon reunification the East re-introduced its federal states, which then jointly but individually joined the West, leaving the East without territory and people which thus vanished in a puff of how international law defines the concept of a state.

The Mainland could pull an East Germany and declare independence at any time, Taipei would accept it. Some old-guard Kuomintang would gripe but they’d get over it. Taipei declaring independence makes no sense… independence from whom? Imperial China? They won that struggle before the PRC even existed. It’s the PRC which is rebel faction in the civil war, you don’t declare independence from rebels if then you grant them independence and, well, the rebels don’t want independence.

I mean China can’t really do anything about the autonomous mainland provinces steadfastly refusing to declare independence, even if you can find precedent of a sovereign state kicking out its provinces unilaterally it’d still be a dick move.